Typically, a digital chip such as this is designed with Verilog (or VHDL in europe) for RTL. Most hardware compilers then also provide test vectors (for registe

Typically, a digital chip such as this is designed with Verilog (or VHDL in europe) for RTL. Most hardware compilers then also provide test vectors (for registers and logic) and built in boundary scan through SPI. When contracting the chip your in-house design software then generates GDS (semiconductor mask design format) which you provide to the vendor. Even without obfuscation, it would be enormously difficult to reverse engineer enough of the design to pass the boundary scan test vectors. Certainly, after manufacture you can decap and check that the product matches the mask. There are various extra design and production steps I'd go through for crypto verification and test, but it would be difficult to fake a chip if they allow verification after SMT on the PCB. After that, physical access and fairly sophisticated methods could bypass it, but you're already trusting TehGoog... so NoSuchAgency shouldn't be your concern.