4 ms·

This is totally incomprehensible to me.

by fiatjaf 9y ago

ycombobreaker 9y ago
Sounds like a learning opportunity to me. It's worthwhile in the long term, as make will outlive most of us.
- dmitriid 9y ago
  There are next to none good learning resources on Makefiles. Most are extremely tersely written, have next to no description of how various parts tie together and assume everyone builds C/C++.
  - ycombobreaker 9y ago
    The GNU make manual is a good place to start. It's not a tutorial, but it is fairly short. If you're on a different platform it's not exact, but most of the important material applies to POSIX make implementations. Replace your own toolchain for the CC and related commands... really anything that takes multiple files as input and emits one file as output should fit the paradigm.
    - dmitriid 9y ago
      > If you're on a different platform it's not exact, but most of the important material applies to POSIX make implementations. Which parts are "most of the material" though? ;) > Replace your own toolchain for the CC and related commands... really anything that takes multiple files as input and emits one file as output should fit the paradigm. I tried to. It's messy and undebuggable if you run into problems. Especially with tools that already look at the whole project (such as Typescript). We ended up using Makefiles as just "command launchers" with targets that basically look like target: invoke-tool
  - JdeBP 9y ago
    That is only true if one does not believe in reading, or makes no effort at all to look for such resources. There are entire books on this subject. * Clovis L. Tondo, Andrew Nathanson, and Eden Yount (1994). Mastering MAKE: a guide to building programs on DOS, OS/2, and UNIX systems. Prentice Hall. * Robert Mecklenburg (2004). Managing Projects with GNU Make. Nutshell Handbooks. O'Reilly Media. ISBN 9780596552541. * John Graham-Cumming (2015). The GNU Make Book. No Starch Press. ISBN 9781593276492.
qu4z-2 9y ago
I don't really know what to tell you, there. Are you generally familiar with the C build process, and bash? The only "unusual" things I'm seeing there are the $@ (target) and $^ (dependencies) automatic variables, the wildcard and patsubst functions, which have the description right in the title, and the general ``target: dependencies \n\t command-list`` format of Makefile rules.
- dmitriid 9y ago
  > The only "unusual" things I'm seeing And then proceeds to list almost the entirety of the Makefile
sk5t 9y ago
Have a look at the lesson on Make from Software Carpentry! http://swcarpentry.github.io/make-novice/ http://swcarpentry.github.io/make-novice/
syncsynchalt 9y ago
You might not be familiar with what C compiler and linker commands look like. Here's a listing of what "make" or "make all" actually executes in the example makefile (just take as given that these are normal and understandable commands to compile and link a binary): cc -Wall -o file1.o -c file1.c cc -Wall -o file2.o -c file2.c cc -Wall -o file3.o -c file3.c cc -Wall -o name_of_bin file1.o file2.o file3.o and "make clean" executes: rm -f *.o name_of_bin The big win is that make looks at modification times of all targets and dependencies. If you type 'make' without changing anything, it completes within microseconds. If you edit only file1.c, then it only recompiles file1.o and re-links name_of_bin. You really miss this kind of speed when moving back to any other kind of dev environment!
robochat 9y ago
Check out https://learnxinyminutes.com/docs/make https://learnxinyminutes.com/docs/make Disclosure: I wrote it so I apologise for any mistakes

This is totally incomprehensible to me.

ycombobreaker 9y ago

Sounds like a learning opportunity to me. It's worthwhile in the long term, as make will outlive most of us.

dmitriid 9y ago
There are next to none good learning resources on Makefiles. Most are extremely tersely written, have next to no description of how various parts tie together and assume everyone builds C/C++.
- ycombobreaker 9y ago
  The GNU make manual is a good place to start. It's not a tutorial, but it is fairly short. If you're on a different platform it's not exact, but most of the important material applies to POSIX make implementations. Replace your own toolchain for the CC and related commands... really anything that takes multiple files as input and emits one file as output should fit the paradigm.
  - dmitriid 9y ago
    > If you're on a different platform it's not exact, but most of the important material applies to POSIX make implementations. Which parts are "most of the material" though? ;) > Replace your own toolchain for the CC and related commands... really anything that takes multiple files as input and emits one file as output should fit the paradigm. I tried to. It's messy and undebuggable if you run into problems. Especially with tools that already look at the whole project (such as Typescript). We ended up using Makefiles as just "command launchers" with targets that basically look like target: invoke-tool
- JdeBP 9y ago
  That is only true if one does not believe in reading, or makes no effort at all to look for such resources. There are entire books on this subject. * Clovis L. Tondo, Andrew Nathanson, and Eden Yount (1994). Mastering MAKE: a guide to building programs on DOS, OS/2, and UNIX systems. Prentice Hall. * Robert Mecklenburg (2004). Managing Projects with GNU Make. Nutshell Handbooks. O'Reilly Media. ISBN 9780596552541. * John Graham-Cumming (2015). The GNU Make Book. No Starch Press. ISBN 9781593276492.

qu4z-2 9y ago

I don't really know what to tell you, there. Are you generally familiar with the C build process, and bash? The only "unusual" things I'm seeing there are the $@ (target) and $^ (dependencies) automatic variables, the wildcard and patsubst functions, which have the description right in the title, and the general ``target: dependencies \n\t command-list`` format of Makefile rules.

dmitriid 9y ago
> The only "unusual" things I'm seeing And then proceeds to list almost the entirety of the Makefile

sk5t 9y ago

Have a look at the lesson on Make from Software Carpentry! http://swcarpentry.github.io/make-novice/ http://swcarpentry.github.io/make-novice/

syncsynchalt 9y ago

You might not be familiar with what C compiler and linker commands look like. Here's a listing of what "make" or "make all" actually executes in the example makefile (just take as given that these are normal and understandable commands to compile and link a binary): cc -Wall -o file1.o -c file1.c cc -Wall -o file2.o -c file2.c cc -Wall -o file3.o -c file3.c cc -Wall -o name_of_bin file1.o file2.o file3.o and "make clean" executes: rm -f *.o name_of_bin The big win is that make looks at modification times of all targets and dependencies. If you type 'make' without changing anything, it completes within microseconds. If you edit only file1.c, then it only recompiles file1.o and re-links name_of_bin. You really miss this kind of speed when moving back to any other kind of dev environment!

robochat 9y ago

Check out https://learnxinyminutes.com/docs/make https://learnxinyminutes.com/docs/make Disclosure: I wrote it so I apologise for any mistakes