4 ms·
We could implement an idealized RISC processor in gates and "flash" it with a program..... That would be fun.
by gravypod 9y ago
We could implement an idealized RISC processor in gates and "flash" it with a program..... That would be fun.
- roywiggins 9y agoAt 20ms per AND, that's 50 Hz. That's... slower than useful, surely?