What exactly do you mean when you say PCI-Express isn't cache coherent? I would think that's dependent on the specific platform more than anything. For example

What exactly do you mean when you say PCI-Express isn't cache coherent? I would think that's dependent on the specific platform more than anything. For example, on a cache coherent architecture like the Freescale T2080, if a PCI device writes to some RAM location that's currently cached, the line automatically gets invalidated. There’s this whole “coherency fabric” thing which handles all of the snooping and interaction between the peripherals.