4 ms·

TFA says it's only good to 14 nm but fabs are already down to 10 nm so I mean this isn't a deterrent. I don't know how STEM are for looking at chips or if we've

TFA says it's only good to 14 nm but fabs are already down to 10 nm so I mean this isn't a deterrent. I don't know how STEM are for looking at chips or if we've got even more powerful microscopes but this particular one isn't good enough to stop a dedicated state level actor. https://en.wikipedia.org/wiki/10_nanometer https://en.wikipedia.org/wiki/10_nanometer

beisner 9y ago
I'm pretty sure you'd still be able to recognize structures/logic, even if you weren't able to exactly identify all the gory parts of a transistor.
dmitrygr 9y ago
the "14" in "14nm" does not refer to any particular dimension. Most structures in an 14nm chip are quite a bit larger than 14nm. It has been many years since the X in "Xnm" actually measured anything. eg: https://www.extremetech.com/wp-content/uploads/2017/03/Slide1-1.jpg https://www.extremetech.com/wp-content/uploads/2017/03/Slide... More details exist online, for example this writeup: https://www.extremetech.com/computing/246902-intel-claims-three-year-advantage-10nm-process-wants-change-define-process-nodes https://www.extremetech.com/computing/246902-intel-claims-th...
raverbashing 9y ago
No, quite the contrary Smaller processes are not very well refined at the moment, and anything that matters is 14nm or bigger You're not building critical stuff on the smaller processes until they're very mature
rsfern 9y ago
TEM really isn't the right tool for reversing large integrated circuits. The sample prep is too finicky and involves slicing out a razor-thin sliver of material to image. You'd use it to get atomic resolution images of say a single transistor, maybe. SEM with serial sectioning is the way to go. I'm sure people are using conventional SEMs for this already, but you could conceivably map entire circuits at high resolution (4nm) pretty quickly with one of the new multi-beam systems. Check out the SRAM cells on slide 17 o this SANDIA report (pdf warning) [0]. [0]: https://www.osti.gov/scitech/servlets/purl/1296536 https://www.osti.gov/scitech/servlets/purl/1296536

beisner 9y ago

I'm pretty sure you'd still be able to recognize structures/logic, even if you weren't able to exactly identify all the gory parts of a transistor.

dmitrygr 9y ago

the "14" in "14nm" does not refer to any particular dimension. Most structures in an 14nm chip are quite a bit larger than 14nm. It has been many years since the X in "Xnm" actually measured anything. eg: https://www.extremetech.com/wp-content/uploads/2017/03/Slide1-1.jpg https://www.extremetech.com/wp-content/uploads/2017/03/Slide... More details exist online, for example this writeup: https://www.extremetech.com/computing/246902-intel-claims-three-year-advantage-10nm-process-wants-change-define-process-nodes https://www.extremetech.com/computing/246902-intel-claims-th...

raverbashing 9y ago

No, quite the contrary Smaller processes are not very well refined at the moment, and anything that matters is 14nm or bigger You're not building critical stuff on the smaller processes until they're very mature

rsfern 9y ago

TEM really isn't the right tool for reversing large integrated circuits. The sample prep is too finicky and involves slicing out a razor-thin sliver of material to image. You'd use it to get atomic resolution images of say a single transistor, maybe. SEM with serial sectioning is the way to go. I'm sure people are using conventional SEMs for this already, but you could conceivably map entire circuits at high resolution (4nm) pretty quickly with one of the new multi-beam systems. Check out the SRAM cells on slide 17 o this SANDIA report (pdf warning) [0]. [0]: https://www.osti.gov/scitech/servlets/purl/1296536 https://www.osti.gov/scitech/servlets/purl/1296536