5 ms·
Bitcoin mining on a vintage Xerox Alto: very slow at 1.5 hashes/second
- dijit 9y agoTo be fair. I'm impressed it's able to do it at all. I compiled a "hello world" in C staticly on my laptop the other week as a demo of how things have grown; to my horror it wouldn't have even fit in memory of my first computer.
- nicklaf 9y agoSome people still care! Chuck Moore's colorForth has this inplementation of an IDE driver in just five lines of code: bsy 1f7 p@ 80 and if bsy ; then ; rdy 1f7 p@ 8 and if 1f0 a! 256 ; then rdy ; sector 1f3 a! swap p!+ /8 p!+ /8 p!+ /8 e0 or p!+ drop p!+ drop 4 * ; read 20 sector 256 for rdy insw next drop ; write bsy 30 sector 25 6 for rdy outsw next drop ; comments p@ read 8-bit port p!+ write 8-bit port, increment port insw read n words from port outsw write n words to port /8 shift right 8 bits bsy wait till busy bit clear rdy wait till data-ready bit set sector set logical sector and command read read 256 sectors write write 256 sectors https://web.archive.org/web/20160304043631/http://www.colorforth.com/ide.html https://web.archive.org/web/20160304043631/http://www.colorf...
- arthurcolle 9y agosame environment other than memory constraints? ... I'd think this wouldn't even work at all
- userbinator 9y agoSHA256 doesn't require all that much storage nor code --- a few KB at most for a simple, not very fast implementation.
- kens 9y agoWell, I got SHA-256 running on a 1960s punched card machine with 16K of memory so the hardware requirements aren't too much. http://www.righto.com/2015/05/bitcoin-mining-on-55-year-old-ibm-1401.html http://www.righto.com/2015/05/bitcoin-mining-on-55-year-old-...
- yuhong 9y agoI wonder about Ryzen's new SHA1/SHA256 instructions, not only for Bitcoin but also things like SHA1 collisions.
- mschuster91 9y agoHmm. In contrast to a GPU / ASIC implementation, where thermal load is spread equally across the die, I'd guess that coin-mining usage levels will lead to local overheating and thus throttling - or worse, if there's no thermal sensor for this area, even permanent damage.
- ryan-c 9y agoIntel's chips have those too - but I highly doubt the speedup will provide even close to gpu power efficiency.
- mrb 9y agoAMD's and Intel's SHA256 instructions are utterly useless to compete with ASICs: they use approximately 10 000 times more energy (4 orders of magnitude!) than a 16nm Bitcoin mining ASIC per hash: 1000 J/GH vs 0.1 J/GH. Source: I wrote one of the first GPU miners, founded a Bitcoin mining ASIC system integrator company, etc.
- le-mark 9y agoFrom your perspective, how should an individual with a non trivial sum of money ($20k for example) get started mining BTC? Do you favor mining or investing by purchasing?
- rjsw 9y agoMy copy of The TTL Data Book suggests that the ALU was able to do XOR, an earlier blog post stated that microcode opcode bits go through a table instead of being fed directly to the 74181 function pins. I wonder why Xerox didn't want to use all the ALU features.
- kens 9y agoIn microcode, the Alto provides the 16 most useful functions of the 74181 (calling most of the 74181's operations "mostly useless"). This includes XOR and OR. However, the Alto copied the Data General Nova's instruction set, which doesn't include OR and XOR, so you can't use these instructions from machine code. I think there's extended microcode that provides "extra" instructions for XOR and OR and an improved BCPL compiler to make use of them, but I haven't tracked it down. See the Alto hardware manual (page 4) on bitsavers for details: http://bitsavers.informatik.uni-stuttgart.de/pdf/xerox/alto/AltoHWRef.part1.pdf http://bitsavers.informatik.uni-stuttgart.de/pdf/xerox/alto/...
- userbinator 9y agoHere is a document I found on the DG Nova instruction set: http://users.rcn.com/crfriend/museum/doco/DG/Nova/base-instr.html http://users.rcn.com/crfriend/museum/doco/DG/Nova/base-instr... If you scroll down to "Arithmetic/Logic Instructions" you'll see that they did not have room for XOR nor OR, since several of the 8 opcodes that fit into the 3-bit field are what we'd normally think of as "one-operand", but have been expanded to be "two-operand" (oddly enough, there is an increment but no decrement instruction either.) It's interesting to compare to two other well-known CPUs with a 3-bit ALU opcode field: The Z80's (and 8008/8080/8085) ALU opcodes are: ADD/ADC/SUB/SBC/AND/XOR/OR/CP The x86's ALU opcodes are: ADD/OR/ADC/SBB/AND/SUB/XOR/CMP
- kens 9y agoThat's an interesting comparison with microprocessor ALU operations. (6502 is similar to Intel but doesn't have add/subtract without carry.) Note that the Nova uses two additional instruction bits for the carry. Thus, the Intel instruction sets use two of the 8 opcodes for add with carry and subtract with borrow/carry, but the Nova doesn't. So it should be easier for the Nova to fit in additional useful ALU instructions. (Not to mention the Nova has 16-bit instructions.)
- indescions_2017 9y agoIt actually puts compute power in perspective for me quite nicely, as GigaHashes per second (GH/s) is the most common metric in mining pools. My core i5 laptop gets around 10MH/s. A gaming desktop with GTX1050 pushes above 100MH/s. Compare that to a state-of-the-art Antminer at ~11Th/s using 1.1kW. Estimating a large pool size of ~250 Ph/s. And the Alto's rough payout calculation of about a billionth of a penny for 2017 looks right! Any chance ethereum and zcash mining are up next for that poor old Alto that just wants to retire and dream of electric sheep?
- kens 9y agoIf I understand etherium and zcash mining, they use algorithms designed to require a lot of RAM so it is ASIC-resistant. (I.e. they want mining to be practical on a PC, not requiring custom hardware.) Unfortunately for the Alto, the gigabytes of data required for mining won't fit into the 512kB memory. Even swapping to the hard disk won't work, since that only holds 2.5MB. Thus, while Bitcoin would have been possible in the 1970s, etherium and zcash wouldn't have been.
- deleted 9y ago[deleted]
- miahi 9y agoNot only lots of RAM but lots of very fast RAM. This is what makes it ASIC-resistant for now (it's not hard to attach a huge RAM to an ASIC, but going for hundreds of GB/s is really expensive). So unfortunately it's GPUs for now.
- Animats 9y agoThey're using the British Cruddy Programming Language? Don't they have the Mesa compiler up? BCPL is about halfway between assembler and C.
- kens 9y agoStill working on getting Mesa running... BCPL isn't as primitive as I expected. It's surprisingly similar to C, except lacking types. C's structs, unions, bitfields are almost a direct copy of BCPL, along with the ternary ? operator. C's lvalues, rvalues, and pointers are also just like BCPL. BCPL has way more control flow statements than C: if EXP do STATEMENT, unless EXP do S, test EXP then S1 or STAT2, test EXP ifso S1 ifnot S2, while EXP do S, until E do S, S repeatwhile EXP, S repeatuntil EXP, S repeat, switchon EXP into CASES, etc. The C language trimmed out a lot of the redundancy. BCPL's switchon statement is just like C's with fall-through cases unless you use a break.
- janci 9y agoDoes it run DOOM?
- lostgame 9y agoI know this is a joke, but the Alto (IIRC) was the first computer to have a 3d maze like game - I believe they even played it over LAN!