3 ms·
I wonder why noone (?) has tried to bolt on a GPU style SIMT extension to a general purpose CPU architecture. It's a more flexible programming model with a dece
by jabl 9y ago
I wonder why noone (?) has tried to bolt on a GPU style SIMT extension to a general purpose CPU architecture. It's a more flexible programming model with a decently(?) low additional cost compared to vector style SIMD.
IIRC Andy Glew had some slide deck where he advocated that. Edit: https://drive.google.com/file/d/0B5qTWL2s3LcQNGE3NWI4NzQtNTBhNS00YjgyLTljZGMtNTA0YjJmMGIzNDEw/view?ddrp=1&hl=en https://drive.google.com/file/d/0B5qTWL2s3LcQNGE3NWI4NzQtNTB...
- Arelius 9y agoMy understanding is the instruction set isn't as far removed as you seem to imply, and the huge differences are in programming model/compiler. AVX-512 has many of the primitives required, and ISPC ports the GPU programming model to CPU SIMD.
- jabl 9y agoYes, AVX-512 IIRC adds scatter/gather, and masking/predication, bringing it substantially closer to classical supercomputer long vector ISA's compared to the short vector ISA's mainstream CPU's have been equipped with for the past decade or so. Still, even with these improvements, as explained in Andy Glew's slide deck I linked to, it's less flexible than a SIMT style approach.