3 ms·
One thing that worries me about RISC-V is how much encoding space for (major) opcodes they already used up. There are 7 bits to encode the opcodes. Of those 12
by CodesInChaos 9y ago
One thing that worries me about RISC-V is how much encoding space for (major) opcodes they already used up.
There are 7 bits to encode the opcodes. Of those 128 possible values, 3/4 are used for 16-bit compressed/thumb instructions.
The remaining 32 values are allocated as follows:
* 4 are for custom instructions
* 4 are for larger than 32-bit instructions
* 21 are already used
* 3 are reserved for future use
While there is some space for minor opcodes (encoded via func3/func7) inside of the already allocated major opcodes, this allocation seems overly generous to me considering how young the instruction set still is.
I would have felt far more comfortable with compressed instructions only taking 1/2 instead of 3/4 of the total available space.
- rwmj 9y agoRISC-V isn't limited to 32 bit instructions. In fact RISC-V insns are variable length, and as well as 16 bit (compressed extension) they can be longer than 32 bits -- in fact much much longer. More details in section 1.2 of this document: https://riscv.org/wp-content/plugins/pdf-viewer/stable/web/viewer.html?file=https://content.riscv.org/wp-content/uploads/2017/05/riscv-spec-v2.2.pdf https://riscv.org/wp-content/plugins/pdf-viewer/stable/web/v...