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> But the difference between Skylake-EP/X and XeonPhi in relation to AVX-512 support were known way in advance. I don't think differences in specific instructi

> But the difference between Skylake-EP/X and XeonPhi in relation to AVX-512 support were known way in advance. I don't think differences in specific instructions were known in advanced, at least at/ shortly after KNL launch. Or rather I was instructed not to mention it.

dogma1138 9y ago
https://en.wikipedia.org/wiki/AVX-512#New_instructions_in_AVX-512_foundation https://en.wikipedia.org/wiki/AVX-512#New_instructions_in_AV... The instruction set info on that page is 2-3 years old, nothing has changed since then. I've seen those tables at least a year before the KL launch they were also available on Intel's webiste (the blog irrc) at least a year before KL. I don't know who told you that that information is embargoed. EDIT: The inital table was here: http://software.intel.com/en-us/blogs/2013/avx-512-instructions http://software.intel.com/en-us/blogs/2013/avx-512-instructi... the blog post no longer exists, try archive.is https://software.intel.com/en-us/articles/performance-tools-for-software-developers-intel-compiler-options-for-sse-generation-and-processor-specific-optimizations https://software.intel.com/en-us/articles/performance-tools-... "The instruction groups common to both the Intel Xeon Phi processor x200 and the Intel Xeon processor are AVX-512F and AVX-512CD. The AVX-512ER and AVX-512PF groups are implemented in the Intel Xeon Phi processor x200 only. The AVX-512BW, AVX-512DQ and AVX-512VL groups are implemented only in the Intel Xeon processor." https://software.intel.com/en-us/blogs/additional-avx-512-instructions https://software.intel.com/en-us/blogs/additional-avx-512-in... This used to lead to a PDF with the tables, the PDF is still there but it's a living document which is updated every time, the latest revision was in 2017 but as early as 2014 there was already a split into COMMON-AVX512, MIC-AVX512, CORE-AVX512 with a difference between future Xeon Phi and Xeon processors.

dogma1138 9y ago

https://en.wikipedia.org/wiki/AVX-512#New_instructions_in_AVX-512_foundation https://en.wikipedia.org/wiki/AVX-512#New_instructions_in_AV... The instruction set info on that page is 2-3 years old, nothing has changed since then. I've seen those tables at least a year before the KL launch they were also available on Intel's webiste (the blog irrc) at least a year before KL. I don't know who told you that that information is embargoed. EDIT: The inital table was here: http://software.intel.com/en-us/blogs/2013/avx-512-instructions http://software.intel.com/en-us/blogs/2013/avx-512-instructi... the blog post no longer exists, try archive.is https://software.intel.com/en-us/articles/performance-tools-for-software-developers-intel-compiler-options-for-sse-generation-and-processor-specific-optimizations https://software.intel.com/en-us/articles/performance-tools-... "The instruction groups common to both the Intel Xeon Phi processor x200 and the Intel Xeon processor are AVX-512F and AVX-512CD. The AVX-512ER and AVX-512PF groups are implemented in the Intel Xeon Phi processor x200 only. The AVX-512BW, AVX-512DQ and AVX-512VL groups are implemented only in the Intel Xeon processor." https://software.intel.com/en-us/blogs/additional-avx-512-instructions https://software.intel.com/en-us/blogs/additional-avx-512-in... This used to lead to a PDF with the tables, the PDF is still there but it's a living document which is updated every time, the latest revision was in 2017 but as early as 2014 there was already a split into COMMON-AVX512, MIC-AVX512, CORE-AVX512 with a difference between future Xeon Phi and Xeon processors.