I think the main challenge of Chisel is the choice of language (Scala). The designers of Chisel don't speak the same "language" as your average hardware design

I think the main challenge of Chisel is the choice of language (Scala). The designers of Chisel don't speak the same "language" as your average hardware designer. Maybe this is why people have invested tons of hours to re-write risc-v in pure verilog [1] and VHDL [2]. --- [1] https://github.com/cliffordwolf/picorv32 https://github.com/cliffordwolf/picorv32 [2] https://github.com/sergeykhbr/riscv_vhdl https://github.com/sergeykhbr/riscv_vhdl