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Darpa Funds Development of New Type of Processor
- atonse 9y agoMy guess at what's driving this need, is for intelligence agencies to make sense of and traverse the large and complicated graphs that are used to map real world relationships. As they collect more data related to this, they'll need better ways to traverse these graphs.
- Frenchgeek 9y ago"Darpa Funds Development of New Type of Processor: Worlds First Non-Von-Neumann " https://en.wikipedia.org/wiki/Harvard_architecture https://en.wikipedia.org/wiki/Harvard_architecture ?
- antoinealb 9y agoWas my thought as well "What? AVR are harvard architecture and I can buy them for 0.1$". But after looking, apparently it is more linked to new parallelism paradigms: > "This non-von-Neumann approach allows one big map that can be accessed by many processors at the same time, each using its own local scratch-pad memory while simultaneously performing scatter-and-gather operations across global memory."
- convolvatron 9y agoprocessors with cheap and limited local memory and costly and scalable external memory are also not new....and that doesn't really make them non-von-neuman except that it doesn't make sense to execute out of global memory
- kodfodrasz 9y agohttps://en.wikipedia.org/wiki/Dataflow_architecture https://en.wikipedia.org/wiki/Dataflow_architecture ? cheap clickbait title.
- jacquesm 9y agoAnd any compute fabric.
- rayiner 9y agoWhat does the memory interface look like for this? None of the papers I can find indicate how you can get so much parallelism out of the CPU <-> memory interface. An interesting approach to non-Von Neumann computing is to put ALUs in memory, to take advantage of the fact that DRAMs have far more internal bandwidth than what is exposed in traditional systems: http://researcher.ibm.com/researcher/files/us-leejinho/tvlsi_authorcp_20170329.pdf http://researcher.ibm.com/researcher/files/us-leejinho/tvlsi....
- kevinnk 9y agoManufacturing logic on the same wafer as DRAM is difficult since the processes are so different. On the other hand, manufacturing on separate dies and connecting with an interposer or TSVs gets you tremendous bandwidth and relatively low latency; this is how some newer generation graphics memory is implemented (see https://en.m.wikipedia.org/wiki/High_Bandwidth_Memory https://en.m.wikipedia.org/wiki/High_Bandwidth_Memory).
- phkahler 9y agoBut logic and SRAM are more compatible. I'm still curious because multiple processors having random access to a large memory is not easy. The scratchpad they mention sounds like a cache, but maybe it's something more than that.
- convolvatron 9y ago'scratchpad' implies they are directly addressable, i guess you could say a software controlled cache.
- white-flame 9y agoCPU logic on DRAM process is apparently a solved problem: http://venraytechnology.com/Implementations.htm http://venraytechnology.com/Implementations.htm
- kevinnk 9y ago
- andreasgonewild 9y agoWorlds first, my ass. Journalism is dead; has been for a long, long time; we're living in the end-times of the walking dead.
- szczepano 9y agoMore about this processor here http://www.darpa.mil/attachments/BAA-16-52_HIVE_FAQ_20160831_posted5.pdf http://www.darpa.mil/attachments/BAA-16-52_HIVE_FAQ_20160831...
- AriaMinaei 9y agoFrom a layman: Would this necessitate a different programming paradigm?
- grondilu 9y agoYes, it's mentioned on page 2 of the article (you may have missed it was two-paged)
- Etheryte 9y agoYeah, that's a design choice I just don't understand. The article is already lengthy, what improvement does splitting it to pages manually give? I completely missed the fact that it's multiple pages.
- annnnd 9y agoIn the old days this technique was used to get information about number of people who found the article interesting enough to read the next page, all without JavaScript. This of course assumes that readers notice the "next page" link, where is where they seem to have failed (or maybe the expectations of readers have changed so much that the new breed of readers no longer notice such links - quite possible).
- radicalbyte 9y agoIt was used for ad impressions. Each page read = new ads = more $$ for the publisher.
- mikepurvis 9y agoFor better or worse, it also improves analytics for the publisher— they can measure what proportion of readers made it to page 2, and of those, how long they spent on page 1. (Yes, some of that could be done with scroll tracking too, "clicked to view page 2" is still a very strong signal of engagement.)
- 9y ago
- nnfy 9y agoThe civilian application proposed in the article, mapping the many to many relationships between amazon purchasers and items purchased, is unsettling.
- empath75 9y agoIs it just me or is the illustration of 'graphs' of totally the wrong kind of graphs? I'm sure they don't mean bar charts.
- angstrom 9y agoYeah, they missed including a pie chart and a gantt chart for good measure.
- mring33621 9y agoMost of the industry has moved on to Deep Pie Charts.
- cat199 9y agoFYI, they're called 'chicago charts' for those in the know...
- qntty 9y agoYeah, a bit embarrassing for a magazine that covers technology, HIVE defintely works on graph-theory graphs. Even weirder is the (Source: DARPA) attribution.
- droopyEyelids 9y agoAlso they say the processor will use "1000 times less energy". Incredibly confused thinking goes into writing a sentence like that.
- roywiggins 9y agoMaybe an Igon Value Problem? http://rationalwiki.org/wiki/Igon_Value_Problem http://rationalwiki.org/wiki/Igon_Value_Problem
- mackncheesiest 9y agoThat would make sense to me. I had to stop and chuckle when I saw the author put "[John] von Neumann architecture..." when quoting somebody who was simply talking about the industry standard term of "von Neumann architecture". What's next? "[Alan] Turing machines"?
- bantunes 9y agoCan't wait for this publicly funded research to make some private corporation billions!
- f4rker 9y agoThis person gets it...
- jacquesm 9y agoYou mean like the internet? Or self driving cars?
- jackmott 9y agoor government protected at&t bell labs which invented everything we do!
- utternerd 9y agoThe "Internet" would've happened regardless, Xerox's Parc Project and their "Parc Universal Packet" is one example. [0] https://en.wikipedia.org/wiki/PARC_Universal_Packet https://en.wikipedia.org/wiki/PARC_Universal_Packet
- JackFr 9y agoThe original ARPANET was a proof of concept of a network which could withstand the failure multiple simultaneous nodes, that is, survive a nuclear strike. Whether knowing you have a robust command and control network makes you more or less likely to use your own nuclear weapons in a first strike is arguable. But it did guarantee a second strike would be possible (which if you believe MAD, made the world safer.) And robust second-strike capability, in the end, is about killing people.
- angstrom 9y agoNot sure if sarcastic or sincere. You can damn near predict what will be the future tech 10 years down the line based on what DARPA is doing to make killing more efficient.
- khana 9y agoGood luck with that site. Too many bs ads.
- youdontknowtho 9y agoThe way that they describe sparse graph processing in memory sounds like the kind of pointer chasing that makes run-time object-oriented programming memory access patterns slow. I wonder if that was a translation to PR artifact, or if there might be something there to accelerate some of the Java or .Net memory access patterns that we all use.
- cvoss 9y agoThere is a very direct sense in which pointer chasing _is_ the fundamental operation of sparse graph processing. On top of what access patterns the developers tend to use, there's always the JVM garbage collector (the bane of efficiency) which runs a basic graph algorithm over the entire program's network of pointers. Although, I suspect in many applications the graph in question is small (by comparison to big-data-scale graphs) and throwing heavy machinery like this at it would be overkill. Then again, maybe I'm not dreaming big enough, and this kind of processor will make the need for cache line locality optimizations, careful instruction scheduling around memory I/O, and half-second freezes for GC a thing of the past?
- Symmetry 9y agoSounds a lot like the Cell in concept. https://en.wikipedia.org/wiki/Cell_(microprocessor) https://en.wikipedia.org/wiki/Cell_(microprocessor)
- vonmoltke 9y agoThe SPUs on the Cell were closer in concept to DSPs than they are to what the article describes. The Cell chip itself was essentially a general-purpose CPU joined in silicon to several DSPs. The SPUs are still designed for sequential processing of memory, just smaller, discrete blocks. The whole chip is orchestrated by a standard von Neumann processor anyway, so that acts as a bottleneck to keeping the SPUs busy.
- phonon 9y agoHow is this different than FORTH processors, like http://www.greenarraychips.com/ http://www.greenarraychips.com/ http://www.forth.org/cores.html http://www.forth.org/cores.html http://www.ultratechnology.com/chips.htm http://www.ultratechnology.com/chips.htm https://www.complang.tuwien.ac.at/anton/euroforth2007/papers/guzeman.pdf https://www.complang.tuwien.ac.at/anton/euroforth2007/papers... http://wiki.c2.com/?ChuckMoore http://wiki.c2.com/?ChuckMoore etc.
- dnautics 9y agoThose do stack based computation?
- phonon 9y agoYes?
- kruhft 9y agoThey they are parallel chips with many cores (128 IIRC) with small amounts of 'stack' RAM running Forth directly. Chuck designs them 'by hand' using Color Forth, a transistor simulation model and ... Forth words. Similar to the machine found in TIS-100: http://www.zachtronics.com/tis-100/ http://www.zachtronics.com/tis-100/
- dreamcompiler 9y agoGraph processing machines are not new. The signal-to-noise ratio of this article is so low that I can't tell how this architecture differs from e.g. the Cray Eldorado. Or the Connection Machine for that matter.
- dmix 9y agoThere is a real use-case here that has become so widespread and common in the intelligence and law enforcement community that they saw utility in having a processor optimized for graph analysis. They likely see some uses for it outside of that market as well which is why both Intel and Qualcomm are interested in working on it. Even if it is a variation on 'Threadstorm' it's still optimized for this particular type of data processing. I read the whole article and I don't see anywhere in this claiming it is a new idea. But certainly there is no other processor on the market like this one. So it fits the category of "new type of processor", even if it's for a dedicated use-case - just like those ML optimized processors. There's a big difference between knowing it is theoretically possible and the value you get from a real world implementation with real users. That sounds pretty news worthy to me.
- PhantomGremlin 9y agoThe signal-to-noise ratio of this article is so low I started reading the comments before I read the article. And, sadly, once I saw your comment I knew exactly who wrote the article. One click and confirmed!
- wyldfire 9y agoWhat's the "community detection" benchmark referenced in the article?
- Cyph0n 9y agoI'm happy to see that a group from Georgia Tech is working on this. Actually, my group just sent in a proposal for the DARPA SSITH[1] program. The high-level goal of SSITH is to design low-level (firmware or hardware) protection techniques that can guard against common software vulnerabilities that lead to hardware exploitation. [1]: http://www.darpa.mil/news-events/2017-04-10 http://www.darpa.mil/news-events/2017-04-10
- cardiffspaceman 9y agoI can't tell if the processing in TFA is the kind of graph processing that a machine like TIGRE or SKIM were proposed to do in the '80's. Or perhaps the graph nodes are less specialized than these machines?