Today's x86 CPUs usually contain some kind of microcode but it is distinct concept from uOPs (micro operations) that are usually referenced in high level micro

Today's x86 CPUs usually contain some kind of microcode but it is distinct concept from uOPs (micro operations) that are usually referenced in high level micro architecture descriptions. Incoming instructions are decoded by some combination of hardware and microcode into uOPs that then get executed by RISC-like execution units. Then there is slight terminological problem with the tendency of both Intel and AMD to label essentially any binary blob they don't feel like documenting as "microcode", ranging from few bytes of configuration data, through actual CPU microcode to complete RTOS images for some embedded CPU.