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I think the parent with "satisfactory" meant "possible to achieve the maximum performance the hardware will support" (after all why settle for less?) You are an
by dagss 9y ago
I think the parent with "satisfactory" meant "possible to achieve the maximum performance the hardware will support" (after all why settle for less?) You are answering another question.
Also, the point where you have reorganized your whole computation to be AVX-friendly it is just extra obfuscation to try to wrtie regular C and then check that the compiler outputs what you meant. Just using SIMD instructions is WYSIWYG; writing pure C is like competing in an obfuscated C contest.
Keep in mind it is not only SIMD, one might use shuffles and permutations in registers etc to communicate between the SIMD "threads".
I think the SSE/AVX intrinsics are nice to work with; they do what they say, but GCC will also turn them into something else if not supported, and perhaps apply some extra optimizations.
- marmaduke 9y agoYeah I didn't mean that I would be over backwards to make it work, just that I happen to see great speed ups for my real world code with almost no effort. For more complex stuff I'd be looking at ISPC or OpenCL before assembly since I can't afford to write ISA specific code.
- marmaduke 9y agoAlso, in my experience, maximum performance for most algorithms is not a clear cut line that I fall short of for lack of motivation. I see that maximum as a rather fuzzy unknown, approaching it is has diminishing returns on the time spent optimizing.