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Could a chip based on the SuperH ISA (off which the patents expire) [0] like JCore compete with RISC-V if similar effort would be put into it? [0] https://en.w

Could a chip based on the SuperH ISA (off which the patents expire) [0] like JCore compete with RISC-V if similar effort would be put into it? [0] https://en.wikipedia.org/wiki/SuperH https://en.wikipedia.org/wiki/SuperH

bobsam 9y ago
For that matter, what is wrong with MIPS? Open ISA and a full open source implementation by MIPS themselves?
- redtuesday 9y ago
  I don't know as I don't have enough knowledge about the matter. I'm asking because on Wikipedia and in videos about jcore (which uses SuperH) it is touted as a nice ISA: > High code density compared to other 32-bit RISC ISAs such as ARM or MIPS[8] important for cache and memory bandwidth performance.
  - bobsam 9y ago
    Fair enough. For the sake of completeness, it should be mentioned that arm, mips and riscv also have 16-bit ISA extensions to achieve better density.
- tropo 9y ago
  MIPS has numerous defects. There is a legacy wart in the form of a delay slot that doesn't match modern pipelines; this causes all sorts of annoyances. The MMU doesn't use a hardware-walked tree, cutting into performance with cache misses and even code execution. Forming addresses requires a silly number of instructions, or alternately you give up and just load relative to a specific register. The architecture fails to specify a coherent fully physical cache, causing all sorts of performance-killing trouble in OS kernels. There are wasted bits, commonly in the "shamt" field. The "hi" and "lo" registers interfere with scheduling multiplication and division.
  - bobsam 9y ago
    Are you familiar with the newer mips revisions? They have been modernizing the architecture during the last 10 years.
CalChris 9y ago
SuperH is 32b so that would need to be updated. Another worthy contender to be rehabilitated is DEC Alpha. Indeed, the Sunway Taihu Light supercomputer (fastest the on TOP500 list) uses the Sunway SW26010 which is based on the Alpha 21164.
- redtuesday 9y ago
  From what I have read [0] the j-core people have that on the roadmap for 2019+. Seeing that Sunway TaihuLight still uses DDR3 I wonder how much power they could save by going with DDR4 and it's lower voltage. It's cool to see so many older ISAs coming back. [0] http://j-core.org/roadmap.html http://j-core.org/roadmap.html
- nickpsecurity 9y ago
  I recommend against Alpha since Intel acquired the IP and had a licensing partnership with Samsung they shut down. Quite proprietary despite wonderful advantage of PALcode. Also a simple architecture used even recently for CompSci CPU's (eg SAFE).

bobsam 9y ago

For that matter, what is wrong with MIPS? Open ISA and a full open source implementation by MIPS themselves?

redtuesday 9y ago
I don't know as I don't have enough knowledge about the matter. I'm asking because on Wikipedia and in videos about jcore (which uses SuperH) it is touted as a nice ISA: > High code density compared to other 32-bit RISC ISAs such as ARM or MIPS[8] important for cache and memory bandwidth performance.
- bobsam 9y ago
  Fair enough. For the sake of completeness, it should be mentioned that arm, mips and riscv also have 16-bit ISA extensions to achieve better density.
tropo 9y ago
MIPS has numerous defects. There is a legacy wart in the form of a delay slot that doesn't match modern pipelines; this causes all sorts of annoyances. The MMU doesn't use a hardware-walked tree, cutting into performance with cache misses and even code execution. Forming addresses requires a silly number of instructions, or alternately you give up and just load relative to a specific register. The architecture fails to specify a coherent fully physical cache, causing all sorts of performance-killing trouble in OS kernels. There are wasted bits, commonly in the "shamt" field. The "hi" and "lo" registers interfere with scheduling multiplication and division.
- bobsam 9y ago
  Are you familiar with the newer mips revisions? They have been modernizing the architecture during the last 10 years.

CalChris 9y ago

SuperH is 32b so that would need to be updated. Another worthy contender to be rehabilitated is DEC Alpha. Indeed, the Sunway Taihu Light supercomputer (fastest the on TOP500 list) uses the Sunway SW26010 which is based on the Alpha 21164.

redtuesday 9y ago
From what I have read [0] the j-core people have that on the roadmap for 2019+. Seeing that Sunway TaihuLight still uses DDR3 I wonder how much power they could save by going with DDR4 and it's lower voltage. It's cool to see so many older ISAs coming back. [0] http://j-core.org/roadmap.html http://j-core.org/roadmap.html
nickpsecurity 9y ago
I recommend against Alpha since Intel acquired the IP and had a licensing partnership with Samsung they shut down. Quite proprietary despite wonderful advantage of PALcode. Also a simple architecture used even recently for CompSci CPU's (eg SAFE).