512 bit registers fit 8 doubles and 16 floats, and it's not as simple as 16 flops per cycle. They are probably counting fused multiply adds which are usually th

512 bit registers fit 8 doubles and 16 floats, and it's not as simple as 16 flops per cycle. They are probably counting fused multiply adds which are usually the highest flop/cycle instruction. If an FMA can be done in one cycle, then we have 18 x 32 = 576 flops, so if it's clocked at e.g. 2.0 ghz, peak performance would be ~1.1 Tflops. Edit: I see someone wrote exactly 8 hours before..