4 ms·
<rumor> Initial leaks point to a PCIe 3.0 64x interconnect </rumor>
by valarauca1 9y ago
<rumor>
Initial leaks point to a PCIe 3.0 64x interconnect
</rumor>
- dom0 9y ago^ Well we do already know that the interconnect between modules uses the same PHYs as PCIe 3.0.
- drewg123 9y agoSure.. but I'm wondering about the on-die interconnect between the 4 different packages that share the die. Eg, everything seems like an EPYC is 4 Ryzen packages, and a "thread ripper" is 2 Ryzen packages. So it seems logical that there is something connecting those 2 or 4 packages, and that fabric as bandwidth and latency characteristics. If it is somehow infinitely fast, then that's great for me.
- lightedman 9y agoActual verification shows up to 128 PCI-E lanes.