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> For the other companies just shipping 10nm, we expect what they call 10nm to have a logic transistor density measured close 50 million transistors per square
by ricw 9y ago
> For the other companies just shipping 10nm, we expect what they call 10nm to have a logic transistor density measured close 50 million transistors per square millimeter, not the 100 million per square millimeter that we offer on our 10nm. It’s almost a full generation difference.
Something to keep in mind. I've read in multiple articles that other foundries have caught up with intel. Apparently not quite. Though it's probably closer than it has been for a while.
- awalton 9y ago> I've read in multiple articles that other foundries have caught up with intel. This was 100% intentional market warfare by those other companies. Companies needed to make up the ideological gap and Intel took a bit of a stumble, so they decided to fudge the numbers and make it look like they somehow made up a whole generation's progress overnight - think "megahertz wars", only this time worse (basically, the numbers are completely meaningless market monikers now - you're forced to go read the spec sheets.) Sadly, it's worked wonders...
- arca_vorago 9y agoI was under the impression the others hadn't quite caught up but were stuck at 14nm and 16nm. Are you saying the nm claims are wrong or is there somthing more complex here in the industry I'm missing? Sorry, I'm not a hardware guy and have lots to learn in the area.
- jfoutz 9y agoAlso not a hardware guy, but the issue seems to revolve around density, intel puts transistors on a chip "like this" the other guys do it "l i k e t h i s". They can make small things, but haven't worked out how to really pack them in next to each other and work reliably.
- deepnotderp 9y agoThis isn't really true, there's a lot of marketing misinformation on both sides. Both with Intel and with TSMC/Samsung/GloFo. The thing is that with "14nm/16nm", the front end of the line (FEOL) was with FinFETs at a "true' 14/16nm density, but the backend of the line (BEOL) and interconnects were at the older node. But this doesn't necessarily mean that Intel has a moral high ground here, since they've had a lower than industry standard density from "32nm" and "40nm" and below. TL;DR: "nm" node names are basically useless now, just know that TSMC 10nm isn't a production node and TSMC "7nm" ~= Intel "10nm"
- fpoling 9y agoFrom https://en.wikipedia.org/wiki/10_nanometer https://en.wikipedia.org/wiki/10_nanometer : Samsung's 10 nm process is reportedly denser than Intel's 14 nm process, and as Intel and TSMC have not shipped any 10 nm devices yet, this currently gives Samsung a technological lead in terms of density, respectively.[30][31][32]
- deepnotderp 9y agoThis is both right and wrong.... Intel's "10nm" ~= to TSMC's "7nm", so they are right that their "10nm" is a lot less dense than Intel's "10nm", but they both ship are around the same time, so this means that there's really no difference in terms of time to market. It's true that the node names are messed up, but Intel acting as if they have the "moore-al high ground" and they "aren't marketers" rubs me the wrong way because from "32nm" and "40nm" and below, Intel's node was far less dense than the industry standard.