3 ms·
I'd add to that Agner Fog's early report on Ryzen: http://agner.org/optimize/blog/read.php?i=838 http://agner.org/optimize/blog/read.php?i=838 The micro-op ca
by CalChris 10y ago
I'd add to that Agner Fog's early report on Ryzen:
http://agner.org/optimize/blog/read.php?i=838 http://agner.org/optimize/blog/read.php?i=838
The micro-op cache size increased to 2048 from Intel's 1536 μops. His testing shows 5 instructions per clock cycle up from Intel's 4. There are limits to the ILP a scheduler can find; more in one area means more demand in another. This is no mean feat for AMD to pull off.