3 ms·
What is so special about reduced ISAs, what's the differentiating factors between them? I mean they are so reduced that the ones I've seen are largely the same
by posterboy 10y ago
What is so special about reduced ISAs, what's the differentiating factors between them?
I mean they are so reduced that the ones I've seen are largely the same few logic ops. RAM access and interrupts might differ some, but a) memory access should follow the implementation and b) essentially everything else is memory mapped (avr, c51, pic)
- FullyFunctional 10y agoTo fully appreciate this, one would need much experience with microprocessor implementation. It's not reduced for the point of being simpler or smaller, but because it represent a local optimum of perf/area for running C code, especially for small to medium implementations. However, much like the Alpha, RISC-V has been carefully designed to be efficient to scale UP, that is, to superscalar out-of-order implementations. Do read the spec and the footnotes; they are delightful: https://raw.githubusercontent.com/riscv/riscv-isa-manual/master/release/riscv-spec-v2.2.pdf https://raw.githubusercontent.com/riscv/riscv-isa-manual/mas...