4 ms·
I see on this thread a lot of people getting blind-folded by the "open-source" term attached to the headline of this article. First of all RISC-V can mean more
by sweden 9y ago
I see on this thread a lot of people getting blind-folded by the "open-source" term attached to the headline of this article.
First of all RISC-V can mean more than one thing: it can refer to the architecture, which is in fact open and free to use, or it can refer to the implementation of the same architecture, which will not be necessarily free or open source. For example, check the so claimed SiFive company which was promising free and open source implementations of RISC-V: http://www.eetimes.com/document.asp?doc_id=1331690 http://www.eetimes.com/document.asp?doc_id=1331690
"“A year ago there was quite a debate if people would license a core if there was a free version, [but now] we’ve seen significant demand for customers who don’t want an open-source version but one better documented with a company behind it,” said Jack Kang, vice president of product and business development at SiFive."
By the end of the day, they just decided to follow ARM's path by providing license fees to their CPUs.
Secondly, when people say that RISC-V is "free" and "open-source" and that will allow companies to create cheaper and more open hardware, that is just an illusion. There are many more things on a SoC other than a CPU (like memories, communication buses, GPUs, power management processors, and so on). Cutting costs on a CPU will not make the cost of an SoC go down to zero, the CPU is just a small part of the puzzle.
With RISC-V, you either need to implement the CPU yourself (which will be extremely expensive and time consuming) or you will have to find someone who provides with CPU cores already implemented. And of course that you need to have support and guarantees that the cores you bought will work on silicon. There will be always a huge cost associated when shipping CPUs, you can't escape from that.
You can already imagine that open-source hardware doesn't play by the same rules as open-source software, it's a completely different game with completely different rules.
And people speak of ARM's royalties like if they were a very bad thing. Truth to be told, the royalties you pay ARM can be a very good deal taking into account that you get access to silicon proven CPU cores, support from the best engineers in the industry and you automatically get covered by the many CPU patents that ARM owns.
And you can even choose on how you want to pay for ARM's CPU licenses: you can either choose to license an already implemented CPU design by ARM or you can buy an architectural license and implement your CPU completely from scratch (this is what Apple and Qualcomm are current doing). You don't need to be completely tied to ARM.
Even in the royalty fees you can choose whether you want to pay a big upfront license fee but then paying low royalties per device or you can choose to pay a low upfront license but compensating on the royalties per device.
There is a lot of misinformation going around the possibilities of RISC-V, mostly of this misinformation coming from people involved in the development of the spec. Don't be fooled by the buzzwords "open-source hardware" and "free hardware".
- jbarham 9y ago> You don't need to be completely tied to ARM. The point is that if you want to use the ARM ISA you have to pay ARM. Not so with RISC-V. Anyone is free to fab a RISC-V chip without paying royalties.
- sweden 9y agoYou are talking like you could download RISC-V from the internet and send it to the foundry for mass production without additional costs or effort. RISC-V is just a document, is not an implementation. There are many costs involved into designing a CPU that end up costing much more money than paying a license fee. Check this comment: https://news.ycombinator.com/item?id=14284450 https://news.ycombinator.com/item?id=14284450
- jbarham 9y agoIn that comment you say "RISC-V is thrown around like if it's an already working CPU but it is not" which is false since there are multiple existing, functioning RISC-V implementations in silicon (https://www.sifive.com/products/freedom/ https://www.sifive.com/products/freedom/), FPGAs and software (https://bellard.org/riscvemu/ https://bellard.org/riscvemu/). Most people on HN should understand the difference between an ISA specification and its implementation in silicon.
- sweden 9y agoThe tone of your comment is very unfortunate taking into account the content of it. The second like you showed is just a simple FPGA implementation, you can't really use for ASIC designs. The first one is a completely different implementation by a different company. And they are not really providing the whole source. I challenge you to find a place to download their designs yourself. I will be waiting.
- FullyFunctional 9y agoThe second is real silicon. I have a couple. But all this talk is missing the point. For companies looking to design a product for which the processors is a means to an end, RISC-V holds a tremendous time-to-market advantage and full complete control of your own destiny. That, more than anything, will matter for the 1st wave of adopters. (RV has other technical merits that you for some reason discount).