I've done both VHDL an Verilog extensively in school but not professionally. From my experience verilog was much nicer to use. I designed a complete MIPS pipeli

I've done both VHDL an Verilog extensively in school but not professionally. From my experience verilog was much nicer to use. I designed a complete MIPS pipelined CPU: https://github.com/eggie5/SDSU-COMPE475-SPRING13 https://github.com/eggie5/SDSU-COMPE475-SPRING13 However, speaking to many FPGA professionals I know, VHDL has a much more traction in industry and patricianly in defense contractors.