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ANI reminds me of HDLs [1] - I'm assuming that's the inspiration with terminology like "latch"? Hardware is also concurrent by default. Coding some hardware lo
by robmccoll 9y ago
ANI reminds me of HDLs [1] - I'm assuming that's the inspiration with terminology like "latch"?
Hardware is also concurrent by default. Coding some hardware logic will also change the way you approach coding. Anyone who's interested get an FPGA demo board and write some verilog or VHDL - I highly recommend it.
1. https://en.wikipedia.org/wiki/Hardware_description_language https://en.wikipedia.org/wiki/Hardware_description_language
- verall 9y agoYes, I can't really understand why he didn't mention HDLs. I had never seen ANI before but both the syntax and terminology reminded me of VHDL.
- snerbles 9y agoThese layers of abstraction seem to lead software bloggers to re-discovering concepts known by hardware engineers for decades.
- mighty_atomic_c 9y agoI was thinking this while reading, too. Concurrency is everywhere in hardware by default, and explicitly statesd with fork...join!
- DeltaWhy 9y agoCan anyone recommend a good course/book/tutorial for learning Verilog/VHDL? I have a demo board from a course I took in college and would love to try doing some projects with it, but I've had a hard time finding any good learning material.
- snerbles 9y agoWriting test benches in Icarus Verilog was quite helpful for me, along with pretty much everything at asic-world[0]. I haven't looked for a VHDL equivalent of Icarus, unfortunately. Of course, always remember that "can be compiled" != "can be synthesized". [0] http://www.asic-world.com/verilog/index.html http://www.asic-world.com/verilog/index.html