Little known in the industry, VHDL struct syntax allows for very neat and concise method to be used, called [Gaisler's method](http://www.gaisler.com/doc/vhdl2p

Little known in the industry, VHDL struct syntax allows for very neat and concise method to be used, called [Gaisler's method](http://www.gaisler.com/doc/vhdl2proc.pdf http://www.gaisler.com/doc/vhdl2proc.pdf). The entire Processor and architecture is written using it (http://www.gaisler.com/index.php/downloads/leongrlib http://www.gaisler.com/index.php/downloads/leongrlib) - and it is fantastic to work with - it feels like a piece of object oriented programming, while using low level language of VHDL. Not sure if anyone has tried to apply Gasler's method to SystemVerilog, but verilog on its own falls quite short in this regard.