4 ms·

> Not that I can do anything about it, my conclusion over nearly 4 decades is that we have failed to take advantage of the increasingly denser silicon to make h

> Not that I can do anything about it, my conclusion over nearly 4 decades is that we have failed to take advantage of the increasingly denser silicon to make higher level machines, in particular machines that recognise the difference an instruction and a data element. That's basically the CISC concept (https://en.wikipedia.org/wiki/Complex_instruction_set_computing https://en.wikipedia.org/wiki/Complex_instruction_set_comput...) all over again. The problem still being: which instructions do you choose to implement in hardware and how do you make a compiler smart enough to recognize when to use them? Remember, CISC went out of style because all of those high level instruction weren't being used when processor manufacturers generated statistics on commonly used software.

oldandtired 9y ago
This is where the programmer or even compiler writer should have control, by allowing access to a micro-programmable base that supplies a standard set of instructions. The capability of adding instructions at need being under control of the machine administrator. For most tasks, this additional capability will not be needed, but for those who need to high optimisation, then they can do so with aplomb. Especially for those who are writing VM's for their respective high-level languages. As with anything, security of the hardware would need to be considered. One set of minicomputer hardware that I used to program on decades ago (Honeywell DPS6-92's) had a micro-programmable cpu. We didn't use it, as the base level hardware and associated software were sufficient for our needs. But I had heard that various organisations had incorporated their own instructions when needed. The choice of normal instructions can be quite small, but the ability to put in user defined instructions would allow certain models of thought to be tested and/or developed at a hardware level.
- RandomOpinion 9y ago
  > ...allowing access to a micro-programmable base... What you're probably looking for is something like Forin's eMIPS (extensible MIPS) project that includes a block FPGA cells as part of the execution pipeline to allow creation of new instructions as needed. https://www.microsoft.com/en-us/research/project/emips/ https://www.microsoft.com/en-us/research/project/emips/

oldandtired 9y ago

This is where the programmer or even compiler writer should have control, by allowing access to a micro-programmable base that supplies a standard set of instructions. The capability of adding instructions at need being under control of the machine administrator. For most tasks, this additional capability will not be needed, but for those who need to high optimisation, then they can do so with aplomb. Especially for those who are writing VM's for their respective high-level languages. As with anything, security of the hardware would need to be considered. One set of minicomputer hardware that I used to program on decades ago (Honeywell DPS6-92's) had a micro-programmable cpu. We didn't use it, as the base level hardware and associated software were sufficient for our needs. But I had heard that various organisations had incorporated their own instructions when needed. The choice of normal instructions can be quite small, but the ability to put in user defined instructions would allow certain models of thought to be tested and/or developed at a hardware level.

RandomOpinion 9y ago
> ...allowing access to a micro-programmable base... What you're probably looking for is something like Forin's eMIPS (extensible MIPS) project that includes a block FPGA cells as part of the execution pipeline to allow creation of new instructions as needed. https://www.microsoft.com/en-us/research/project/emips/ https://www.microsoft.com/en-us/research/project/emips/