3 ms·

Now all we need is for someone to port chisel3 to work on these fpgas.

• Cyph0n 9y ago
  Doesn't Chisel (in theory) support all FPGA tools out of the box? Chisel compiles to Verilog[1], so all you would need to do is import the resulting Verilog into the Xilinx toolchain, then test and synthesize it. [1]: The full process is Chisel -> Firrtl -> Verilog, which is analogous to C++ -> LLVM IR -> ASM.
  • aseipp 9y ago
    Yeah, Chisel shouldn't have a problem with that part. I use Clash (the Haskell equivalent, but not a DSL) quite a lot with a variety of FPGA tools and it tends to work pretty well. The real task, of course, is binding up all those IP interfaces into nice type-safe Chisel interfaces for users... That's always a huge pain, especially for a device of this class -- where it's going to be PCIe and ethernet interfaces you want to use...
    • ktta 9y ago
      Have you used Chisel? I've only worked with Verilog but Chisel and Clash are fascinating to me. A lot of people seem to use Chisel, including the people related to RISC-V development. How do you suggest getting started with Clash?