More likely a Harvard machine, i.e. one where the instruction memory is distinct from the data memory. It is essentially what modern cores have with a their sp

More likely a Harvard machine, i.e. one where the instruction memory is distinct from the data memory. It is essentially what modern cores have with a their split caches, except those things are called "caches" because the architecture then has a lot of machinery for pretending to be a von Neumann Machine with a huge memory. This pretending is done because that's the kind of machine that software expects. But the first unices ran on machines with memories only as big as a modern L1-cache. Moreover, networking and parallelism are everyday issues for software now. It will be interesting to see if software evolves to explicitly recognise that it is really running on a network of small machines + a hierarchy of big external storage devices, of which DRAM is just one.