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> We only got Intel 64 bit CPUs once AMD got them first and people starting to buy them. Intel came first with Itanium (June 2001: https://en.wikipedia.org/w/i

• rbanffy 10y ago
  Alpha, SPARC and MIPS had 64-bit offerings before that. I was reading e-mail on a 64-bit machine when Itanium was called Merced.
  • wolfgke 10y ago
    My parent was talking about Intel 64 bit CPUs.
    • rbanffy 10y ago
      Sorry. I was comparing both sides as an analogy why FPGA's won't be available on mass-market CPUs anytime soon. The reason Itanium never achieved the mass acceptance Intel expected is because, even with Windows running on it, it never ran x86 software at a reasonable price/performance point. Java was Sun's attempt to make SPARC viable by breaking with the ISA compatibility problem. Today, with Linux, JVM, .NET Core and interpreted languages running a lot of the server workloads we have, it'd probably be a very different story. When compared with the other 64-bit architectures we had (I forgot IBM's z/Architecture) amd64 is still an awful register starved overcomplicated architecture.
      • wolfgke 10y ago
        > The reason Itanium never achieved the mass acceptance Intel expected is because, even with Windows running on it, it never ran x86 software at a reasonable price/performance point. That was one (and surely important) reason. There were lots of others reasons > http://courses.cs.washington.edu/courses/csep590/06au/projects/history-64-bit.pdf http://courses.cs.washington.edu/courses/csep590/06au/projec... (seriously: everybody interested in the history of Itanium should read this text), for example: "Davidson also pointed out two areas where academic research could create a blind spot for architecture developers. First, most contemporary academic research ignored CISC architectures, in part due to the appeal of RISC as an architecture that could be taught in a semester-long course. Since graduate students feed the research pipeline, their initial areas of learning frequently define the future research agenda, which remained focused on RISC. Second, VLIW research tended to be driven by instruction traces generated from scientific or numerical applications. These traces are different in two key ways from the average systemwide non-scientific trace: the numerical traces often have more consistent sequential memory access patterns, and the numerical traces often reflect a greater degree of instruction-level parallelism (ILP). Assuming these traces were typical could lead architecture designers to optimize for cases found more rarely in commercial computing workloads. Fred Weber echoed this latter point in a phone interview. Bhandarkar also speculated that the decision to pursue VLIW was driven by the prejudices of a few researchers, rather than by sound technical analysis."
        • bhouston 10y ago
          There seems to be alot of ideas in VLIW that is used by GPUs to get high degrees of parallelism and a hiding of the cost of conditionals.
          • rbanffy 10y ago
            Didn't Transmeta have a processor that used software decoding from x86 to an internal VLIW?