3 ms·
The problem is that everything useful has either showed or stopped scaling. For example, at 10nm (7nm for TSMC) we're getting an ungodly number of logic gates,
by deepnotderp 10y ago
The problem is that everything useful has either showed or stopped scaling. For example, at 10nm (7nm for TSMC) we're getting an ungodly number of logic gates, but sram cell size scaling and Dennard scaling, two things we actually care about have slowed. Similarly, the cost of data movement hasn't come down much.
So 3d transistors and graphene transistors won't help all too much. And besides, FinFET s are basically a form of 3d transistors.
- smaddox 10y agoLogic cell density is still increasing approximately exponentially [1]. [1] https://newsroom.intel.com/newsroom/wp-content/uploads/sites/11/2017/03/Kaizad-Mistry-2017-Manufacturing.pdf https://newsroom.intel.com/newsroom/wp-content/uploads/sites...
- deepnotderp 10y agoExactly! And that's what we don't care about.
- smaddox 10y agoOkay, fine, logic and SRAM cell density are still shrinking (at Intel). Now are you happy? Just read the report.