2 ms·
That would be nifty. Though a radical departure from the status quo. Not to say it couldn't be done. Currently DRAM is designed to fetch large pages at a time
by jackyinger 10y ago
That would be nifty. Though a radical departure from the status quo. Not to say it couldn't be done.
Currently DRAM is designed to fetch large pages at a time which are cached in the CPU. Cache is highly beneficial to latency when there is good memory locality in the program being run.