3 ms·
I think a key point that's ignored is that data movement is the new problem. For example, according to Lawrence Livermore National Laboratories, the cost of mov
by deepnotderp 10y ago
I think a key point that's ignored is that data movement is the new problem. For example, according to Lawrence Livermore National Laboratories, the cost of moving a 64-bit word 1mm ON CHIP on the 10nm projection is approximately equal to doing a 64-bit FLOP. And the cost of DRAM is outrageous... It's what's holding back exascale and will hold back general purpose compute as well.
Architectures MUST change radically to adapt to this or there can be no progress.
- 0xCMP 10y agoAny links? This would be interesting to read/watch more about
- deepnotderp 10y agoI wasn't able to find the exact slideshow, but here's something that gets the point across more or less. Page 37 is what you're looking for. https://fas.org/irp/agency/dod/jason/exascale.pdf https://fas.org/irp/agency/dod/jason/exascale.pdf
- wtallis 10y ago> the cost of moving a 64-bit word 1mm ON CHIP on the 10nm projection is approximately equal to doing a 64-bit FLOP Is this the cost in Joules or nanoseconds?
- deepnotderp 10y agoJoules, but the cost of memory access in terms of speed has an even worse disparity.
- lottin 10y agoThis is just another law at work, namely the law of diminishing returns. At some point, each additional transistor that you add on a chip will increase its computational power less and less.