But a fully open-source, verified implementation - could be the basis for a structured asic, that improves performance and cost with volume, and production may

But a fully open-source, verified implementation - could be the basis for a structured asic, that improves performance and cost with volume, and production may start to happen at kickstarter scale. Altough still, manufacturers and governments could create bugs, if they want. But what will the big difference be between a minimal set of "golden" commercial chips, that have fully open-source drivers and a comprehensive test suite ? not much, it seems. Maybe the way to attack this is seek the places where an FPGA implementation(over say a desktop/laptop? card) would be superior and offer that. One such place could noise cancelling algorithms - such high quality headphones are very expensive(and highly proprietary), need very low-latency compute, and offer an interesting challenge/competition for open-source designers.