3 ms·
Best practice is to have traces less than 3"
by gatsby99 10y ago
Best practice is to have traces less than 3"
- Retric 10y agoTraces only go from CPU pin to Module, latency includes from memory controller CPU pin, CPU pin to PCB, PCB to module, module to RAM chip edge, ram chip edge to actual memory location. Here is a picture, from the center of the CPU, to the bottom edge of the furthest part of the DIM then up. http://harddiskdirect.com/media/catalog/product/cache/1/image/400x/040ec09b1e35df139433887a97daa66f/2/7/27336450.png_noimage_logo http://harddiskdirect.com/media/catalog/product/cache/1/imag... PS: A DIMM is just over 5 inches wide and 0.7 inches tall so if was centered physically on top of a CPU that's 3 inches right there.
- gatsby99 10y agoYou don't know what you are talking about. Memory controllers are typically onchip.
- Retric 10y agoIf by on chip you mean on CPU I agree: https://en.wikipedia.org/wiki/Memory_controller https://en.wikipedia.org/wiki/Memory_controller But, that's part of the CPU packaging, a signal needs to get to these pins on the bottom of the CPU and that takes time.
- koverstreet 10y ago"You don't know what you are talking about" is not a great response to someone who's writing more substantive posts than you.