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Analog computers perform a few, specific operations at full-speed that take quite a few components to do in digital with them only running at a specific, clock

Analog computers perform a few, specific operations at full-speed that take quite a few components to do in digital with them only running at a specific, clock rate. Combining them with digital computers that feed them problems and measure the answers can be quite powerful. See especially the math-coprocessor at first link. The neural simulation at second is illustrative where one wafer (300+ chips) of analog NN's took 294,912 cores to simulate. That's full-custom, high-end digital stuff rather than the average stuff. Analog also gets used a lot in mixed-signal ASIC's where specific things are cheaper or lower power per unit in analog so they mix digital and analog. https://www.schneier.com/blog/archives/2015/07/friday_squid_bl_488.html#c6701962 https://www.schneier.com/blog/archives/2015/07/friday_squid_... https://news.ycombinator.com/item?id=11731697 https://news.ycombinator.com/item?id=11731697 EDIT to add: The paper below is a short history of them that gives examples whose benefits are consistent with other stuff I linked to. Some really cool stuff there, too. :) http://oro.open.ac.uk/5795/1/bletchley_paper.pdf http://oro.open.ac.uk/5795/1/bletchley_paper.pdf

Animats 10y ago
The question is the level of simulation. It's common to use a large number of computers to run a VLSI simulation before fabbing a chip. NVidia has been known to use 50 racks of 1U servers to run a gate-level simulation of a CPU. The machines are running C code generated from VHDL. You could do the job of the GPU with far less CPU power; a gate level simulation is executing multiple instructions for each bit transition in a gate.
- nickpsecurity 10y ago
  The level of detail is part of it. The inherent speed of analog on a large range of numbers is the other part. I recall early efforts to model analog circuits like digital gates overwhelmed the computer. One circuit with 9 transistors took over 50,000 equations or something to check. It just did that much. This is only true when they're doing the things they directly implement like filters or differential equations. They run faster at fraction of size and power.

Animats 10y ago

The question is the level of simulation. It's common to use a large number of computers to run a VLSI simulation before fabbing a chip. NVidia has been known to use 50 racks of 1U servers to run a gate-level simulation of a CPU. The machines are running C code generated from VHDL. You could do the job of the GPU with far less CPU power; a gate level simulation is executing multiple instructions for each bit transition in a gate.

nickpsecurity 10y ago
The level of detail is part of it. The inherent speed of analog on a large range of numbers is the other part. I recall early efforts to model analog circuits like digital gates overwhelmed the computer. One circuit with 9 transistors took over 50,000 equations or something to check. It just did that much. This is only true when they're doing the things they directly implement like filters or differential equations. They run faster at fraction of size and power.