The article is mistaken; the 8 MB is shared between the 50 cores. There's some speculation that it might be a Non-Uniform Cache Access architecture, where local

The article is mistaken; the 8 MB is shared between the 50 cores. There's some speculation that it might be a Non-Uniform Cache Access architecture, where local parts of the shared cache are faster to read/write than other parts. If so, that would certainly be an impressive step. A better article is here: http://www.channelregister.co.uk/2010/06/01/intel_knights_co_processor/print.html http://www.channelregister.co.uk/2010/06/01/intel_knights_co...