Most of the problems with binging new digital ASICs to market have to do with the failure of -XRay-Lithography- EUV (now called Extreme UV) to provide fast enou

Most of the problems with binging new digital ASICs to market have to do with the failure of -XRay-Lithography- EUV (now called Extreme UV) to provide fast enough exposures despite decades of development and billions in research investment. This is a hard problem, but quadruple patterning is also nasty and expensive at 7nm. Even if you can identify the error... if you can't make almost every one of a couple billion transistors correctly, you can't make a modern CPU. I'd recommend reading a few recent articles on the topic: The problem with lithography http://spectrum.ieee.org/semiconductors/devices/leading-chipmakers-eye-euv-lithography-to-save-moores-law http://spectrum.ieee.org/semiconductors/devices/leading-chip... A depressing conclusion https://www.hpcwire.com/2016/07/28/transistors-wont-shrink-beyond-2021-says-final-itrs-report/ https://www.hpcwire.com/2016/07/28/transistors-wont-shrink-b... An optimistic expert https://www.semiwiki.com/forum/content/6590-scott-jones-iss-talk-moores-law-lives.html https://www.semiwiki.com/forum/content/6590-scott-jones-iss-...