4 ms·

A Crash Course in Modern Hardware

75 points by fogus 16y ago

rbanffy 16y ago
Very good presentation on performance and computer architecture with today's technical limitations. With the added feature of Azul making some of the coolest server hardware I ever seen.
- wmf 16y ago
  Considering the total lack of low-end models and the fact that you can't rent it, Azul may be the coolest hardware most people have never seen. Or is that Tilera...
  - aarongough 16y ago
    I'd never heard of them, but it does seem that they're aiming for a niche directly opposite to my usual experience. Seems like they make some awesome stuff though!
  - rbanffy 16y ago
    > may be the coolest hardware most people have never seen That's unfair. They made a couple good videos.
ableal 16y ago
A keeper, if nothing else (and there's much more) for the ultra-clear chart of three stages of CPU performance, 1978-2006, on page 4. The Azul Systems site mentions their own 54-core CPU ( http://www.azulsystems.com/technology/vega http://www.azulsystems.com/technology/vega ), but there does not seem to be much publicly available about the architecture. I was wondering if it was a Sparc derivative (the PDF also mentions Sun's Niagara for Chip Multi Threading). They had a legal tiff with Sun in 2005-2007 ... Couple of links: http://en.wikipedia.org/wiki/Azul_Systems http://en.wikipedia.org/wiki/Azul_Systems , http://www.taranfx.com/boost-java-performance-5x-times-hardware-azul-based-review http://www.taranfx.com/boost-java-performance-5x-times-hardw... P.S. Coincidentally, one of the presentation's references for further reading is the 2007 monograph by Ulrich Drepper also gracing the frontpage of HN today at http://news.ycombinator.com/item?id=1394346 http://news.ycombinator.com/item?id=1394346
- andrewvc 16y ago
  This tech talk is an in depth look at their CPU design process http://www.youtube.com/watch?v=5uljtqyBLxI http://www.youtube.com/watch?v=5uljtqyBLxI
  - deleted 16y ago
    [deleted]
  - ableal 16y ago
    Thanks. I just found out there's a text abstract one can click to expand ... Snippets: [...] The cores are our own design; simple 3-address RISCs with read- & write-barriers to support GC, hardware transactional memory, zero-cost high-rez profiling, and some more modest Java-specific tweaks. [...] history with designing our own chips (1st silicon back from the fab had problems like the bits in the odd-numbered registers bleeding into the even-numbered registers)[...]
deleted 16y ago
[deleted]
Roboprog 16y ago
The idea in the presentation that reinforced my own bias: RAM is the new disk. However, the details they presented make it look worse than I imagined, as memory / FSB speeds are apparently grossly overstated. Now, toss in VMs like Java and .NET walking the heap looking for garbage to take out. Sounds like a cache-miss disaster, to me. My opinion: http://roboprogs.com/devel/2009.07.html#2009_07_30 http://roboprogs.com/devel/2009.07.html#2009_07_30
- th0ma5 16y ago
  well, anything without a vm would be preferred for performance optimization on the hardware, much like anything without needing to be compiled gives one the most control. overall i think you are studying the right things. for me lately, vm's have been okay. the jit compiler is impressive, and llvm & pypy are interesting things too

75 points by fogus 16y ago

Very good presentation on performance and computer architecture with today's technical limitations. With the added feature of Azul making some of the coolest server hardware I ever seen.

wmf 16y ago
Considering the total lack of low-end models and the fact that you can't rent it, Azul may be the coolest hardware most people have never seen. Or is that Tilera...
- aarongough 16y ago
  I'd never heard of them, but it does seem that they're aiming for a niche directly opposite to my usual experience. Seems like they make some awesome stuff though!
- rbanffy 16y ago
  > may be the coolest hardware most people have never seen That's unfair. They made a couple good videos.

ableal 16y ago

A keeper, if nothing else (and there's much more) for the ultra-clear chart of three stages of CPU performance, 1978-2006, on page 4. The Azul Systems site mentions their own 54-core CPU ( http://www.azulsystems.com/technology/vega http://www.azulsystems.com/technology/vega ), but there does not seem to be much publicly available about the architecture. I was wondering if it was a Sparc derivative (the PDF also mentions Sun's Niagara for Chip Multi Threading). They had a legal tiff with Sun in 2005-2007 ... Couple of links: http://en.wikipedia.org/wiki/Azul_Systems http://en.wikipedia.org/wiki/Azul_Systems , http://www.taranfx.com/boost-java-performance-5x-times-hardware-azul-based-review http://www.taranfx.com/boost-java-performance-5x-times-hardw... P.S. Coincidentally, one of the presentation's references for further reading is the 2007 monograph by Ulrich Drepper also gracing the frontpage of HN today at http://news.ycombinator.com/item?id=1394346 http://news.ycombinator.com/item?id=1394346

andrewvc 16y ago
This tech talk is an in depth look at their CPU design process http://www.youtube.com/watch?v=5uljtqyBLxI http://www.youtube.com/watch?v=5uljtqyBLxI
- deleted 16y ago
  [deleted]
- ableal 16y ago
  Thanks. I just found out there's a text abstract one can click to expand ... Snippets: [...] The cores are our own design; simple 3-address RISCs with read- & write-barriers to support GC, hardware transactional memory, zero-cost high-rez profiling, and some more modest Java-specific tweaks. [...] history with designing our own chips (1st silicon back from the fab had problems like the bits in the odd-numbered registers bleeding into the even-numbered registers)[...]

deleted 16y ago

[deleted]

Roboprog 16y ago

The idea in the presentation that reinforced my own bias: RAM is the new disk. However, the details they presented make it look worse than I imagined, as memory / FSB speeds are apparently grossly overstated. Now, toss in VMs like Java and .NET walking the heap looking for garbage to take out. Sounds like a cache-miss disaster, to me. My opinion: http://roboprogs.com/devel/2009.07.html#2009_07_30 http://roboprogs.com/devel/2009.07.html#2009_07_30

th0ma5 16y ago
well, anything without a vm would be preferred for performance optimization on the hardware, much like anything without needing to be compiled gives one the most control. overall i think you are studying the right things. for me lately, vm's have been okay. the jit compiler is impressive, and llvm & pypy are interesting things too