> I thought all these new CPU's were supersets of the instruction set of previous gen i386/amd64 processors? Yes and no. People seem to forget that CPUs are n

> I thought all these new CPU's were supersets of the instruction set of previous gen i386/amd64 processors? Yes and no. People seem to forget that CPUs are not magical and can have bugs. On top of that, each processor family and processor stepping[0] have their own distinct bugs. (An example list can be found at [1], starting on page 8.) Well known incidents include the Pentium FDIV bug[0] and the more recent TSX bug[1] but there are a whole host of lesser ones that never reach the public consciousness because the OS works around them, e.g [2]. Needless to say, creating these workarounds takes time and effort and re-testing and that translates to money. And anything that costs money, well, ... [0] https://en.wikipedia.org/wiki/Stepping_level https://en.wikipedia.org/wiki/Stepping_level [1] http://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/xeon-e3-1200v5-spec-update.pdf http://www.intel.com/content/dam/www/public/us/en/documents/... [2] https://en.wikipedia.org/wiki/Pentium_FDIV_bug https://en.wikipedia.org/wiki/Pentium_FDIV_bug [3] http://www.pcworld.com/article/2464880/intel-finds-specialized-tsx-enterprise-bug-on-haswell-broadwell-cpus.html http://www.pcworld.com/article/2464880/intel-finds-specializ... [4] http://www.dailytech.com/Linus+Torvalds+on+Core+2+Duo+Errata+Totally+Insignificant/article7897.htm http://www.dailytech.com/Linus+Torvalds+on+Core+2+Duo+Errata...