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Curious how you interface your chip (ASIC or FPGA?) with a processor? Or is it a self-contained solution?
by Cyph0n 10y ago
Curious how you interface your chip (ASIC or FPGA?) with a processor? Or is it a self-contained solution?
- simcop2387 10y agoWe're I designing it I'd look at a bus like pci-e since that will provide more Ethan enough bandwidth and many other that arm (or x86) chips that are likely to be doing the decision making based on the data from the chips will already support it. That flexibility along with already being a k own quantity in spinning boards would be a HUGE plus.