Unfortunately MPX sounds cool but is a lot of fluff IMO. It is absolutely not "minimal overhead" in its current implementation and it is very invasive in some w

Unfortunately MPX sounds cool but is a lot of fluff IMO. It is absolutely not "minimal overhead" in its current implementation and it is very invasive in some ways, and breaks many programs. (It also doesn't even provide temporal protection, and is slower than ASAN in those modes?) There's probably a reason almost nobody uses it from what I see; it sounds pretty half-baked... Yes, it might have stopped the CloudFlare case, if they were willing to pay (I believe) for L4 over-read protection overheads (2x I believe, with a LOT of variance between GCC and Intel's compiler), and give up multithreading[1] in their application, and probably deal with other false positives and unsupported things. SGX is completely neutered in Skylake and totally useless without getting your enclave signed by Intel, unless Google has struck a deal or something. You can mostly ignore it. It's good for preparation of your application against future processors where you'll have control over this, though, I guess... TSX would be nice, yes. It's deeply annoying it's taken them so long to get right and that they've stratified that feature amongst CPUs -- is there any _real_ reason my Kaby Lake XPS13 can't support TSX? I doubt it other than "market segmentation makes us more money". I guess now I'm just ranting, though. [1] https://intel-mpx.github.io/overview/ https://intel-mpx.github.io/overview/