2 ms·
Well.. from the SRAM state, or any other side effect you can imagine? Making an example that shows the difference in servicing after every cycle vs. servicing
by revelation 10y ago
Well.. from the SRAM state, or any other side effect you can imagine?
Making an example that shows the difference in servicing after every cycle vs. servicing interrupts only after a basic block is trivial. Configure a timer to interrupt in 10 cycles (or X) and then have a basic block writing 1, 2, 3, .. whatever to SRAM. Read the value in the interrupt routine.
I imagine this is no big deal in x86 or similar where nobody wants or can achieve cycle-perfect interrupts anyway, but it is a common design goal for microcontrollers which have perfectly predictable timing and a lot less MHz. One cycle for an 8 MHz AVR takes 125 ns so you can imagine how servicing interrupts after basic blocks of varying length can introduce jitter into your microcontroller generated signals.
- MackieLoeffel 10y agoThe timer interrupt is indeed a special case and not very well implemented with the JIT compiler currently. The ticker even only ticks once per basic block, not once per instruction, when jit compiling, which is definitly not what you want, when you want to have predictable timing. But making the timing perfect was not a priority, since the programs, with which the VM was tested, also work well, when the timer interrupt only fires once in a while.
- chrisseaton 10y agoThis is the great thing about a JIT though. When someone installs a timing interrupt you can switch to different code that checks the timer frequently enough for hit the target.