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Maybe the implication is that a 10% smaller die means fewer transistors per chip, and therefore lower failure rate per chip, meaning that they get more working
by vosper 10y ago
Maybe the implication is that a 10% smaller die means fewer transistors per chip, and therefore lower failure rate per chip, meaning that they get more working chips out of each wafer or something? And maybe that makes them less expensive, so that they could undercut Intel?
- B1FF_PSUVM 10y agoChip fabrication costs are usually a direct value per mm2 the chip takes up in the wafer. Besides that, a smaller area is also good for yield (% of chips that test out OK out of all fab'ed, in case random defects occur in any of the many processing steps.)