I don't think you'd need to. I expect you'd be able to run the core very fast for a number of milliseconds before having to switch. If performed at the hardwar

I don't think you'd need to. I expect you'd be able to run the core very fast for a number of milliseconds before having to switch. If performed at the hardware level, you may also get some improvement by having the core push its register and low level cache state directly to the next processor, rather than have them pull the data through shared cache or RAM. Unlike a typical context switch, the process is not being resumed from idle, but has an active cache state.