4 ms·
I wish he had used the open source FPGA tools [1] instead of Xilinx ISE... --- [1] http://www.clifford.at/icestorm/ http://www.clifford.at/icestorm/
by pawadu 10y ago
I wish he had used the open source FPGA tools [1] instead of Xilinx ISE...
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[1] http://www.clifford.at/icestorm/ http://www.clifford.at/icestorm/
- mntmn 10y agoI find the open toolchains for Lattice a great development, but I don't have any experience with the ice40 devices yet. Do the Lattice targets have SERDES outputs, clock synthesizers? Edit: I highly doubt that this project would be doable in an ice40 part (no SERDES, relatively small number of LUTs), but maybe an interesting challenge for the reader ;) Maybe with an extra transceiver IC and single bit depth, single zorro protocol...
- pawadu 10y agoNo idea, but I don't think the FOSS tools would support them at this stage anyway. They also support Xilinx Spartan 6 which looks like what this board uses.