7 ms·
Actually designing an ISA is voodoo, but doing the mircrocode is fairly easy. On a tiny little 4-bit design with only a few control lines you can do it by hand.
by nickynickell 10y ago
Actually designing an ISA is voodoo, but doing the mircrocode is fairly easy. On a tiny little 4-bit design with only a few control lines you can do it by hand. Past a certain point, though, it is essentially impossible to do manually without going insane.
It isn't very sophisticated, but the project I mentioned above might satisfy some of your curiosity: https://hackaday.io/project/18859-risk-vee https://hackaday.io/project/18859-risk-vee / https://github.com/cadpnq/risk-vee https://github.com/cadpnq/risk-vee
My methodology was to define each microinstruction that made up every instruction (such as "move pc to memory address register"). I then took all of the control lines in my design and assigned them a bit position in the control store. From there it was just a matter of defining each control line symbolically and "assembling" each microinstruction by ORing the appropriate things together.
- bogomipz 10y agoThis looks great! I am going to follow your project. What emulator are you using to design this? I see all the assembler files are js? Can you elaborate on this? From there it was just a matter of defining each control line symbolically and "assembling" each microinstruction by ORing the appropriate things together"? This is basically your decoder then?
- nickynickell 10y agoSo far everything is in Logisim[1], but I'm actually thinking of writing an emulator so I can debug programs quicker. I started a lisp interpreter in risc-v assembly, but testing my code at 3khz (the max logisim will run my design at) was too painful. The assembler and microcode generator are js+node. risk-vee is a really basic (read: dumb) "common bus" design. All of the internal components of the CPU share the same 32-bit data bus. The heart of the control unit is a ROM that is 32-bits wide. Each bit is connected to one of the various things in the CPU. To make generating the microcode easier I defined a mask for each line. Taking "move the PC to the memory address register" as an example: The register that holds the PC has an output enable line, and the memory address register has select/enable and both would need to be high. Pulling a few lines from microcode.js: pc_read = parseBin("0000-0000 0000-0000 0000-0000 0100-0000"); mem_address_write = parseBin("0000-0000 0000-1000 0000-0000 0000-0000"); So the microinstruction we want ends up being pc_read | mem_address_write I feel like I'm simultaneously under- and over-explaining it. [1] http://www.cburch.com/logisim/ http://www.cburch.com/logisim/
- bogomipz 10y agoI understand. Thanks for the explanation. I didn't know about Logism, this is cool. I can't wait to play with this. Thanks for the link!