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WHOA! MSP430 support is HUGE. In case you don't know, that's a well-known very low-power microcontroller. edit: this might be the only current platform that's

WHOA! MSP430 support is HUGE. In case you don't know, that's a well-known very low-power microcontroller. edit: this might be the only current platform that's <32 bits. I know there was some work on supporting the 8-bit AVR architecture, but MSP430 gets rust a lot closer to super-low-power applications.

vvanders 10y ago
Yeah, in light of how hard AVR is to get over to LLVM it's really encouraging to see MSP430 support.
- masklinn 10y ago
  MSP430 has been in LLVM for a very, very long time though, since 2010 or so.
  - smaddox 10y ago
    Is there a good solution for getting the code onto a chip? Last time I tried with the open source GCC stack, I eventually gave up and installed the painfully large (~1GB) IDE from TI.
    - eckzow 10y ago
      I don't know if I would call it "good" but if you're willing to settle for "official" there is http://www.ti.com/tool/MSP430-FLASHER http://www.ti.com/tool/MSP430-FLASHER which will work with TI's own MSP-FET on all three major OSs. Accepts a .hex so you can use whatever toolchain you want.
    - pjmlp 10y ago
      > I eventually gave up and installed the painfully large (~1GB) IDE from TI. Is it still C++98 only?
MrBuddyCasino 10y ago
There is work underway to create an LLVM backend for the Tensilica Xtensa, so Rust on the ESP32 / ESP8266 might soon be a reality!
- pjmlp 10y ago
  There is nothing that I could do with them, but I love their specs, specially when I think about my first MS-DOS computer. So I imagine there would be lots of nice maker opportunities when that support comes out, not only for Rust, but for other LLVM frontends as well.
  - MrBuddyCasino 10y ago
    Totally, I like to think of them as this generations C64, though some might argue that the Arduino Uno or the Raspberry Pi deserve that title.
- jononor 10y ago
  Do you know of any place one can track this work? Best reference google brought me was https://llvm.org/svn/llvm-project/llvm-gcc-4.2/trunk/gcc/config/xtensa/ https://llvm.org/svn/llvm-project/llvm-gcc-4.2/trunk/gcc/con... - but pretty hard to decipher current state from that...
  - MrBuddyCasino 10y ago
    Got that directly from an Espressif employee as inofficial info, but it has since been confirmed: https://twitter.com/buddy_casino/status/824299718104743938 https://twitter.com/buddy_casino/status/824299718104743938 So I guess its not in the open right now. I wonder if its going to be specific to their chips, because the Xtensa architecture is highly configurable and so there isn't really a single target, but potentially many.
- masklinn 10y ago
  Probably not "soon", AVR took a really long time to get merged into LLVM, and that's a pre-requisite for Rust support.
amenghra 10y ago
For example, the MSP430 was used in Square's early credit card readers to encrypt the mag stripe data.
samlittlewood 10y ago
Fun fact - the MSP430 ISA is based on the PDP-11 ISA.
- pryelluw 10y ago
  Do you have a source I could read? This is super interesting.
  - bryanlarsen 10y ago
    So was the Motorola 6800. I think it would be more surprising if they did everything from scratch rather than modelling it on some pre-existing work... https://en.wikipedia.org/wiki/Motorola_6800 https://en.wikipedia.org/wiki/Motorola_6800
  - deleted 10y ago
    [deleted]
  - samlittlewood 10y ago
    Best independent source I can find is http://www.cpushack.com/CPU/cpu4.html#Sec4Part14 http://www.cpushack.com/CPU/cpu4.html#Sec4Part14. I noticed whilst writing a verilog implementation - seeing the @PC+ relative modes for immediate data made me dig out my PDP-11 reference card. The number of addressing modes has been halved, gaining a bit for register encoding, and the status register is now in the register file (R2), and R3 is used to generate various constants depending on mode. Compare and contrast: * https://en.wikipedia.org/wiki/PDP-11_architecture#CPU_registers https://en.wikipedia.org/wiki/PDP-11_architecture#CPU_regist... * https://en.wikipedia.org/wiki/TI_MSP430#MSP430_CPU https://en.wikipedia.org/wiki/TI_MSP430#MSP430_CPU
    - pryelluw 10y ago
      Awesome, thanks.

vvanders 10y ago

Yeah, in light of how hard AVR is to get over to LLVM it's really encouraging to see MSP430 support.

masklinn 10y ago
MSP430 has been in LLVM for a very, very long time though, since 2010 or so.
- smaddox 10y ago
  Is there a good solution for getting the code onto a chip? Last time I tried with the open source GCC stack, I eventually gave up and installed the painfully large (~1GB) IDE from TI.
  - eckzow 10y ago
    I don't know if I would call it "good" but if you're willing to settle for "official" there is http://www.ti.com/tool/MSP430-FLASHER http://www.ti.com/tool/MSP430-FLASHER which will work with TI's own MSP-FET on all three major OSs. Accepts a .hex so you can use whatever toolchain you want.
  - pjmlp 10y ago
    > I eventually gave up and installed the painfully large (~1GB) IDE from TI. Is it still C++98 only?

MrBuddyCasino 10y ago

There is work underway to create an LLVM backend for the Tensilica Xtensa, so Rust on the ESP32 / ESP8266 might soon be a reality!

pjmlp 10y ago
There is nothing that I could do with them, but I love their specs, specially when I think about my first MS-DOS computer. So I imagine there would be lots of nice maker opportunities when that support comes out, not only for Rust, but for other LLVM frontends as well.
- MrBuddyCasino 10y ago
  Totally, I like to think of them as this generations C64, though some might argue that the Arduino Uno or the Raspberry Pi deserve that title.
jononor 10y ago
Do you know of any place one can track this work? Best reference google brought me was https://llvm.org/svn/llvm-project/llvm-gcc-4.2/trunk/gcc/config/xtensa/ https://llvm.org/svn/llvm-project/llvm-gcc-4.2/trunk/gcc/con... - but pretty hard to decipher current state from that...
- MrBuddyCasino 10y ago
  Got that directly from an Espressif employee as inofficial info, but it has since been confirmed: https://twitter.com/buddy_casino/status/824299718104743938 https://twitter.com/buddy_casino/status/824299718104743938 So I guess its not in the open right now. I wonder if its going to be specific to their chips, because the Xtensa architecture is highly configurable and so there isn't really a single target, but potentially many.
masklinn 10y ago
Probably not "soon", AVR took a really long time to get merged into LLVM, and that's a pre-requisite for Rust support.

amenghra 10y ago

For example, the MSP430 was used in Square's early credit card readers to encrypt the mag stripe data.

samlittlewood 10y ago

Fun fact - the MSP430 ISA is based on the PDP-11 ISA.

pryelluw 10y ago
Do you have a source I could read? This is super interesting.
- bryanlarsen 10y ago
  So was the Motorola 6800. I think it would be more surprising if they did everything from scratch rather than modelling it on some pre-existing work... https://en.wikipedia.org/wiki/Motorola_6800 https://en.wikipedia.org/wiki/Motorola_6800
- deleted 10y ago
  [deleted]
- samlittlewood 10y ago
  Best independent source I can find is http://www.cpushack.com/CPU/cpu4.html#Sec4Part14 http://www.cpushack.com/CPU/cpu4.html#Sec4Part14. I noticed whilst writing a verilog implementation - seeing the @PC+ relative modes for immediate data made me dig out my PDP-11 reference card. The number of addressing modes has been halved, gaining a bit for register encoding, and the status register is now in the register file (R2), and R3 is used to generate various constants depending on mode. Compare and contrast: * https://en.wikipedia.org/wiki/PDP-11_architecture#CPU_registers https://en.wikipedia.org/wiki/PDP-11_architecture#CPU_regist... * https://en.wikipedia.org/wiki/TI_MSP430#MSP430_CPU https://en.wikipedia.org/wiki/TI_MSP430#MSP430_CPU
  - pryelluw 10y ago
    Awesome, thanks.