I always emphasize that it is hardware design, not hardware programming. You describe a physical and electrical reality at register transfer level when writing

I always emphasize that it is hardware design, not hardware programming. You describe a physical and electrical reality at register transfer level when writing implementation code in Verilog and VHDL to be used in FPGAs and ASICs. I've seen quite a few implementations (esp in VHDL) by people not understanding that what they write will end up as hardware. As an example, ff your design contains numerous wide variables written to and read by several instances, that means there will be buses going back and forth between your logic gates. There are only a few levels of wires crossing eachother (that can either be built in an ASIC or are available in a FPGA device). When that limit has been reached, you will have to route around. Think HW (at fairly ideal RTL) and write code to efficiently describe that in a way that _all_ tools in your chain can understand and parse correctly.