Wow, that is some terrible advice. VHDL is just as valid a choice as Verilog. If a FOSS simulator is your requirement, VHDL has ghdl. Also, many companies only

Wow, that is some terrible advice. VHDL is just as valid a choice as Verilog. If a FOSS simulator is your requirement, VHDL has ghdl. Also, many companies only allow VHDL. As better advice, it is worth writing something in both languages to get a feel which one you like better. Both have their own advantages and disadvantages (VHDL: Strongly typed, Verilog: Less verbose).