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Since your question is about visualization -- the kind of schematic this is good for looks like this: http://papilio.cc/uploads/Papilio/fpga_schematic.png http
by wrs 10y ago
Since your question is about visualization -- the kind of schematic this is good for looks like this:
http://papilio.cc/uploads/Papilio/fpga_schematic.png http://papilio.cc/uploads/Papilio/fpga_schematic.png
http://papilio.cc/uploads/Papilio/duofpga_schematic.png http://papilio.cc/uploads/Papilio/duofpga_schematic.png
The drawing tool is really just getting in your way.
And you would use this with KiCAD -- this just takes the place of eeschema.
- spott 10y agoThose schematics though are just throwing everything into a bus... It isn't really differentiating signals at all. What is the difference between just labeling all the FPGA outputs (which is done here), and then labeling the inputs where they go rather than having the bus line in between? Or in other words, is this really the best schematic to be comparing against? >And you would use this with KiCAD -- this just takes the place of eeschema. Yes, I misspoke.
- wrs 10y agoThat's the point -- if the schematic is just connecting pins to buses and other pins, how is that improved by drawing a rectangle and placing the pins on its perimeter? It can be clearer as a simple textual netlist, or even clearer as a simple textual program that generates the netlist.
- spott 10y agoI guess my point was more along the lines of: "Is that schematic really a good schematic, and if not, should it be the goal of a project like this?" Though I get your point as well.