This solves a very specific type of schematic entry where you're connecting tons of digital buses and I/Os. It's pretty tedious and error prone to do this in a

This solves a very specific type of schematic entry where you're connecting tons of digital buses and I/Os. It's pretty tedious and error prone to do this in a schematic editor. If you're ever done a 50-plus page schematic with a lot of digital parts (FPGAs, micros, etc.), you're stuck using a lot of global port definitions and these are the source of a lot of schematic input errors. In the above case, it would actually be easier to see where your net is going using the python script as opposed to going through a printed schematic or even a schematic editor. I know of many schematic types where it would be faster and safer to define the circuit using a script. After all, this is basically what you're doing with an HDL language like Verilog. This is NOT well suited for analog circuits where you need to understand the circuit topology with lots of discrete components.