Regarding PCIe - assuming you're using a hard IP MAC/PHY in your fpga, it's a packed-based protocol that basically only has three packets - read requests, write

Regarding PCIe - assuming you're using a hard IP MAC/PHY in your fpga, it's a packed-based protocol that basically only has three packets - read requests, write requests and completions. Requests have an address and a length, and target physical memory. Completions have the data and a matching tag from the read request. A dma transaction is just when the endpoint generates the request instead of the host CPU, but otherwise it's basically identical.